In order to enhance the academic atmosphere of the University, enhance the academic exchange among the graduate students, improve the scientific research level of the graduate students, and enrich the activities of the graduate students during the celebration of Southeast University, Wuxi Branch continued to hold the academic report meeting of the graduate students on the anniversary of the University.
A total of 182 papers were submitted to the symposium. Wuxi Branch and College of Microelectronics will arrange 11 excellent papers for online academic exchange. Five of them will be selected and recommended to the University, and some of them will be published in the Journal of graduate students of Southeast University.
Let's have a look!
Design of a wide dynamic range single pixel circuit with automatic gain adjustment
One
Reporter: Yang Kai
Instructor: Wu Jin
Abstr: in this paper, a wide dynamic range single pixel circuit structure based on automatic gain switching is designed for a new ZnO based UV detector. The input circuits of CTIA and rtia are used to set the gain of four gears. Under the function of the gear control module, the single pixel structure automatically switches the gear according to the input photocurrent, which can complete the photocurrent detection in the range of 10Pa ~ 1mA while ensuring the accuracy. The wide dynamic range single pixel circuit is designed based on TSMC 0.35 μ m CMOS @ 5V technology. The simulation results show that the dynamic range of the circuit can reach 160db at 1.2 μ s frame rate, and the linearity of the output is over 93%, and the average power consumption is 796.8 μ a.
Simulation of integrated LC passive wireless microfluidic droplet characterization system
Two
Reporter: Wang mi
Instructor: Zhu Zhen
Abstr: we designed an integrated LC passive wireless microfluidic droplet chip to characterize the droplet size and flow rate on the chip. The microfluidic chip includes a droplet generation structure and a LC resonant circuit. When the droplets flow through the capacitance of the plate, the capacitance of the plate will be changed, and the resonance frequency of LC resonant circuit will be changed. Through theoretical derivation and finite element modeling and simulation, we study the correlation between the capacitance, resonance frequency, droplet size and flow rate of LC resonant circuit.
Simulation of 5 nm FinFET self heating effect and research of its heat dissipation path based on finite element method
Three
Reporter: Song Shugui
Instructor: Yin Kuiper
Abstract: the three-dimensional structure of FinFET is not conducive to heat dissipation, which worsens the self heating effect and seriously affects the stability of the device. Therefore, thermal research and thermal design become more and more important. Based on the finite element method, the coupled model of 5 nm FinFET is established. The self heating effect of the device under different working conditions is studied, and the temperature distribution and heat dissipation path of FinFET are obtained. The heat caused by the self heating effect is mainly distributed in the contact surface between the source and drain area and the channel area, but the area with the highest temperature rise is concentrated in the middle of the channel. The internal heat is mainly transmitted to the source drain area and the substrate, and the heat convection plays an important role in this process. In addition, we find that when the gate length is 20 nm, it is the best way to reduce the self heating effect of the device. The results of this paper provide a useful reference for the thermal design of 5 nm and sub 5 nm FinFET devices.
A LED numerical control constant current driver without auxiliary winding and with frequency jitter compensation technology
Four
Reporter: Wang Lei
Instructor: Chang Changyuan
Abstract: This paper presents a kind of constant current (CC) driver with frequency jitter compensation technology. The system adopts the original side feedback (PSR) topology without auxiliary winding, and detects the demagnetization time at the original side to control the output current. In order to improve the accuracy of digital control of switching frequency and reduce the deviation of output current, a double threshold method is proposed. Because resonance current is generated at the end of demagnetization, which is coupled to the gate of power MOSFET through parasitic capacitance, demagnetization time can be measured without auxiliary winding. In this paper, a 5V / 0.85a prototype of the proposed constant current controller is built by using Huahong nec1um HVCMOS technology. The experimental results show that the output current accuracy can reach 1.1%. At the same time, the efficiency of the chip is also higher than 87%. Therefore, the control chip has a broad application prospect in the field of LED driver.
A Novel Constant Current Control Circuit for a High-Precision PSR CC/CV AC-DC Converter
Five
Reported by: Gu Yang
Instructor: Chang Changyuan
Abstract: a high precision primary side regulation (PSR) constant current (CC) output and constant volume (CV) output AC DC converter is put forward and a new constant current control circuit is proposed in this paper. The proposed constant current control circuit options close loop control to adjust the switching period, finally making the switching period converge to twice the demagnetization time , thereby realizing CC output. The circuit innovates a new comparison method for comparing the length of and more exactly, which makes the adjustment of switching period in subsequent circuits more precise, thus effectively improving the accuracy of CC output. In addition, for futher improving CC output accuracy, a new demagnetization time detection circuit is specially designed. CV output is achieved by simultaneously adjusting primary-side peak voltage and the switching frequency. The control chip has been fabricated in Nuvoton 0.35um BCD process, and a 5-V/2-A prototype has been built to test its performance. Test results show that the deviation of output current is within 1.4% and that of output voltage is within 1.0%. Under different loads or inputs, the conversion efficiency varies in 76.2%~80.1%.
A Novel Bootstrap Diode with Enhanced Reverse Recovery Characteristics in 100V GaN Gate Driver
Six
Reporter: Zou Yanqin
Instructor: Zhu Jing
In this paper, a new bootstrap diode (BSD) used for GaN gate driver ICs, which has its a side side engineering based on high energy ion implantation is first proposed. On the aside side, the p-type Dynamic Field Limiting Ring (pDFLR) and the Floating Electrode (FE) are employed. The pDFLR can greatly suppress the peak electric field on both sides of the diode during reverse recovery period, which leads to a significant improvement in reverse recovery robustness. The FE consists of P+, N+ and P+, which can increase the minority carrier recombination rate during reverse recovery period, therefore, a fast reverse recovery is realized. In the drift region, the partial n-type Buried Layer (nBL) are formed based on high energy ion implantation, which reduces the on-state resistance in on-state without sacrificing the breakdown voltage in off-state. Additionally, the nBL shortens the minority carrier extraction path from drift region to negative electrode, as a result, the superior trade-off curve between forward voltage drop (VF) and reverse recovery charge (Qrr) can be realized. A great deal of experiments and simulations show that the reverse recovery robustness of the proposed BSD is improved by more than 11 times. Furthermore, the Qrr of the proposed structure is only 3.1nC, which is 24% lower than that of the conventional device at the same forward current (IF) of 0.1A.
A bit by bit quantization method for keyword recognition based on crnn
Seven
Reporter: Sun Yuhao
Instructor: Liu Bo
Abstract: keyword recognition (KWS) is one of the research fields of automatic speech recognition (ASR). KWS algorithm based on neural network is obviously superior to other algorithms. It is very suitable to deploy KWS algorithm on portable hardware devices to achieve excellent performance, but due to the limited hardware storage resources, the number of weights is too large to apply. Quantification is a natural way to solve this problem. In this paper, we propose a quantization formula, which considers the weight symmetry of the origin, reorganizes the order of 1-bit quantization and the minimum alternating quantization of the residuals, and proposes a translation method of bit by bit multi bit conversion. In addition, the method is applied to convolutional recurrent neural network (crnn) to solve the KWS problem, and the results are analyzed from RMSE and accuracy. The method proposed in this paper can obtain a smaller RMSE between the quantization weight and the full precision weight at the cost of increasing the computational complexity, but it can limit the training time to a reasonable range by performing quantization in a small batch. The proposed quantization method can achieve acceptable accuracy through 3-bit quantization, and save about 91% of storage compared with the full accuracy. With 4-bit quantization, the accuracy is not lost compared with the full accuracy, and 79% of the storage is saved. The quantization method proposed in this paper can achieve better performance and save memory resources, and can be used to deploy the KWS algorithm based on neural network more effectively on hardware devices.
The design of keyword recognition system based on Collaborative Optimization of circuit architecture system
Eight
Reported by: Shen Zeyu
Instructor: Liu Bo
Abstract: in this paper, an ultra-low power keyword accelerator based on BWN is proposed. In order to reduce the power consumption and maintain the recognition accuracy under different background noise, we propose a bit by bit and layer by layer quantization method, which quantizes the depth neural network (DNN) into BWN. This work can support real-time recognition of up to 10 keywords under different background noise types and SNR (from 5dB to near microphone), with a power consumption of 15.1? W.
Design of PLL based on ring oscillator for GPS
Nine
Reporter: LAN Defa
Instructor: Chen Chao
Abstract: among many parts of GPS receiver, PLL plays an important role in providing stable oscillation signal for the system. Voltage controlled oscillator (VCO), as an important part of PLL, has a direct impact on the performance of the whole PLL. The oscillator can be divided into LC-VCO and ring VCO. Based on the traditional ring oscillator structure, this paper proposes a phase-locked loop which can be used in GPS to provide reference frequency for ADC and digital front-end. The ring oscillator has a lower temperature coefficient, so the tuning mode of the control tail current is changed to control varactor. The simulation results show that the performance of the PLL is higher than that of the conventional PLL.
Design of MRAM memory arithmetic fusion multiplier
Ten
Reporter: Xiong Kangxiang
Instructor: Cai Hao
Abstract: with the CMOS technology entering the 7Nm process era, the problem of static power consumption of the circuit becomes more and more serious. In addition, the traditional von Neumann structure storage wall problem also limits the development of computer performance. In order to improve the energy efficiency of the circuit, an operation method based on the logic of the voting device (MIG, major inverter graph) is proposed in this paper, which can be realized by a single MRAM unit. On this basis, this paper designs the approximate full adder, 4-2 compression circuit, multi bit multiplier and other circuits based on the voting logic of MRAM. Firstly, it analyzes how to construct the above logic with the voting logic of MRAM in theory. Secondly, it designs and simulates the hardware circuit.
A low voltage SRAM replication bit line timing optimization technology